1. Field of the Invention
The present invention relates to techniques for communicating between integrated circuit chips. More specifically, the present invention relates to a cable that uses active connectors and capacitive coupling to facilitate high-speed signaling between integrated circuit chips.
2. Related Art
Advances in semiconductor technology presently make it possible to integrate large-scale systems, including tens of millions of transistors, onto a single semiconductor chip. Integrating such large-scale systems onto a single semiconductor chip increases the speed at which such systems can operate, because signals between system components do not have to cross chip boundaries, and are not subject to lengthy chip-to-chip propagation delays. Moreover, integrating large-scale systems onto a single semiconductor chip significantly reduces production costs, because fewer semiconductor chips are required to perform a given computational task.
However, these semiconductor chips still need to communicate with other chips, and unfortunately, these advances in semiconductor technology have not been matched by corresponding advances in inter-chip communication technology. Semiconductor chips are typically mounted onto a printed circuit board that contains multiple layers of signal lines for inter-chip communication. However, a semiconductor chip can contain about 100 times to 1000 times more signal lines than a printed circuit board. Consequently, only a tiny fraction of the signal lines on a semiconductor chip can be routed across the printed circuit board to other chips. This problem is creating a bottleneck that is expected to worsen as semiconductor integration densities continue to increase.
To overcome this communication bottleneck, researchers have recently developed an alternative technique, known as “Proximity Communication,” to communicate between semiconductor chips. Proximity Communication can be implemented by integrating arrays of capacitive transmitters and receivers onto active surfaces of integrated circuit (IC) chips to facilitate inter-chip communication. If a first chip is situated face-to-face with a second chip so that transmitter regions on the first chip are capacitively coupled with receiver regions on the second chip, it is possible to transmit signals directly from the first chip to the second chip without having to route the signal through intervening signal lines within a printed circuit board. The advantage of such an arrangement is that a large number electronic terminals on one chip can each communicate with corresponding electronic terminals on the other chip.
Proximity Communication makes it possible to communicate an extremely large bandwidth per unit area. For example, the size and center-to-center pitch of Proximity Communication terminals in an exemplary implementation can be 20 microns and 30 microns, respectively. Under Proximity Communication, signals travel in the direction normal to the surface of the chip. Therefore, Proximity Communication allows communication to take place across a fully populated two-dimensional array of terminals, with many rows and many columns.
For comparison purposes, the size and pitch of a typical wire bond terminal may be 100 microns on a side with a pitch of 150 microns from the center of one terminal to the neighboring terminal. Furthermore, wire bonds are typically limited to a few rows. Hence, wire bonds generally do not enable a large fully populated two-dimensional array of terminals. Also, wire bonds are permanent, and do not permit rematabilty of connectors. (Note that term “rematability” refers to the ability to connect, disconnect, and reconnect terminals under field conditions.)
Proximity communication works well for chips that are located in close proximity to each other. Unfortunately, when chips need to communicate with other chips father away, a cable must be used. Passive electrical cables have long been used to interconnect active circuits within a digital system. The density of such connections is typically limited by the physical cabling structure, and specifically by the connection endpoints, due to the connection density of the attachment mechanism. Signal deterioration caused by impedance mismatches and electrical near-end crosstalk are major problems that limit the density and bit-rate of inter-chip communication at the board and backplane levels of the interconnect hierarchy. Furthermore, high insertion forces are often required due to the need to simultaneously connect a large number of copper pins to their corresponding mating receptacles. The electronic properties of the connectors, such as cross-coupling and impedance mismatch, often degrade or limit signal quality and reliability. Yet another limitation of conventional connectors is that they typically are designed for remateable connections at the printed circuit board level. However, these connectors are not suitable for detachable connection to an individual IC chip. Accordingly, these effects often limit the maximum density and maximum bandwidth of these board-to-board connections.
In addition to the connector limitations, passive electrical cables between boards are typically driven by transmitters and corresponding receivers that are located on the transmitting and receiving boards, respectively. Thus, the transmitter must typically drive the output connector on the transmitting board, the entire length of the cable, and the input connector on the receiving board. A particular transmitter/receiver pair must be carefully tested and verified for a variety of system applications, which may involve different types of connector and cables. Such verification is valid for a particular length and type of cable, and may be invalid for another cable length or type. Therefore, to ensure that the circuit can drive the cable, retesting and redesign is necessary when changing the cable length or type.
Because of the large number of choices of connectors, cable types, and cable lengths, it is exceedingly difficult to verify that all possible combinations are allowable. The burden is on the system designer to laboriously determine through analysis, simulation, and experimentation if the specific system design will work within acceptable margins.
In stark contrast to the scaling of connectors, the bit-rates and achievable density of on-chip-level interconnect has been progressing rapidly to the point that there is a substantial mismatch of several orders of magnitude between the density of electrical signaling on-chip versus that which can be achieved off-chip.
Hence, what is needed is an apparatus for communicating between integrated circuits without the problems described above.